Yilei Li
contact: liyilui@gmail.com
Education Background
- PhD in Electrical Engineering, UCLA (2016)
Industry Experience
- Hardware Architect, Kneron (2016 - 2017)
- Architecture design and implementation lead for first-in-class AI acceelrator chip for edge devices
- Research Scientist, Novumind (2017 - 2019)
- Microarchitecture for AI accelerator
- Hardware-aware model optimization
- Research Scientist, Facebook (2019 - Present)
- Hardware-model co-design and optimization
Expertise Areas
- Efficient Video Understanding Models
- Multi-Modal Model and System Design
- Hardware-Model Co-Optimization
- AI Accelerator Design
Selected Publications and Patents
- Yilei Li et al., Improving Efficiency in Neural Network Accelerator using Operands Hamming Distance Optimization, Neurips 2019 EMC2 Workshop
- Li Du, Yuan Du, Yilei Li et al., A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things, IEEE Transactions on Circuits and Systems I: Regular Papers, 2018. (Winner of IEEE Darlington Best Paper Award 2021)
- Yilei Li et al., A novel fully synthesizable all-digital RF transmitter for IoT applications, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
- Convolution operation device and convolution operation method, US20180137414A1
- Convolution operation device and method, US10169295B2
- Method and system for elastic precision enhancement using dynamic shifting in neural networks, US20200050429A1
- Buffer device and convolution operation device and method, US10162799B2
- Multi-layer neural network, US10552732B2